Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9113	1			T2	11		T14	17		T15	30
len_5001_7500	14516	1			T2	46		T14	17		T15	30
len_2501_5000	9213	1			T2	6		T14	17		T15	30
len_1025_2500	5449	1			T2	5		T14	10		T15	16
len_769_1024	6204	1			T2	1		T3	39		T4	10
len_513_768	6423	1			T3	33		T4	6		T14	2
len_257_512	21021	1			T2	2		T3	47		T4	15
len_0_256	257594	1			T2	10		T3	41		T4	8
len_keccak_block_sizes[72]	720	1			T14	2		T15	3		T67	3
len_keccak_block_sizes[104]	624	1			T14	2		T15	3		T67	3
len_keccak_block_sizes[136]	520	1			T14	2		T15	3		T67	3
len_keccak_block_sizes[144]	432	1			T3	1		T14	2		T15	3
len_keccak_block_sizes[168]	322	1			T3	2		T15	3		T67	3
len_1	762	1			T14	2		T15	3		T67	3
len_0	1200	1			T2	2		T14	2		T15	3