Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9122	1			T13	3		T16	1		T18	3
len_5001_7500	14786	1			T13	12		T16	11		T18	7
len_2501_5000	9376	1			T13	2		T16	1		T18	3
len_1025_2500	5461	1			T13	1		T18	2		T19	14
len_769_1024	6088	1			T1	11		T13	8		T14	20
len_513_768	6413	1			T1	7		T13	4		T14	15
len_257_512	20987	1			T1	11		T13	7		T14	16
len_0_256	257822	1			T1	7		T2	9		T13	67
len_keccak_block_sizes[72]	714	1			T19	2		T76	3		T123	2
len_keccak_block_sizes[104]	615	1			T19	2		T76	3		T163	3
len_keccak_block_sizes[136]	516	1			T76	3		T163	3		T78	3
len_keccak_block_sizes[144]	426	1			T76	3		T163	3		T78	3
len_keccak_block_sizes[168]	323	1			T14	1		T76	3		T163	3
len_1	750	1			T17	2		T19	2		T76	3
len_0	1222	1			T13	4		T17	1		T18	4