Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	696	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5638	1			T15	8		T16	24		T29	2
len_601_800	12806	1			T15	18		T16	38		T29	9
len_401_600	8291	1			T15	10		T16	27		T29	3
len_201_400	16489	1			T1	251		T15	10		T16	16
len_65_200	74476	1			T1	680		T15	1		T16	1
len_min_for_xof_require_squeeze	1012	1			T1	10		T17	9		T19	9
len_keccak_block_sizes[72]	767	1			T1	5		T17	9		T19	9
len_keccak_block_sizes[104]	766	1			T1	5		T17	9		T19	9
len_keccak_block_sizes[136]	770	1			T1	5		T17	9		T19	9
len_keccak_block_sizes[144]	289	1			T1	5		T142	1		T139	5
len_keccak_block_sizes[168]	276	1			T1	5		T139	5		T77	1
len_datapath_width	14256	1			T1	5		T2	3		T3	3
len_2_63	215315	1			T1	1329		T2	6		T3	6
len_1	68	1			T25	1		T149	2		T77	1