Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9122	1			T1	30		T4	17		T13	16
len_5001_7500	14738	1			T1	30		T4	17		T12	33
len_2501_5000	9342	1			T1	30		T4	17		T12	34
len_1025_2500	5427	1			T1	16		T4	10		T12	20
len_769_1024	6804	1			T1	4		T4	2		T12	4
len_513_768	7149	1			T1	2		T4	2		T12	3
len_257_512	21742	1			T1	244		T4	2		T12	4
len_0_256	259983	1			T1	1897		T2	9		T4	290
len_keccak_block_sizes[72]	721	1			T1	3		T4	2		T12	2
len_keccak_block_sizes[104]	625	1			T1	3		T4	2		T13	1
len_keccak_block_sizes[136]	526	1			T1	3		T4	2		T13	1
len_keccak_block_sizes[144]	408	1			T1	3		T4	2		T14	3
len_keccak_block_sizes[168]	319	1			T1	3		T14	3		T17	3
len_1	757	1			T1	3		T4	2		T12	2
len_0	1217	1			T1	3		T4	2		T12	2