Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	708	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5852	1			T13	50		T23	4		T69	24
len_601_800	13448	1			T13	108		T23	16		T69	69
len_401_600	9038	1			T13	86		T23	7		T69	53
len_201_400	16685	1			T13	35		T17	251		T23	7
len_65_200	74512	1			T1	685		T13	78		T14	685
len_min_for_xof_require_squeeze	1011	1			T1	9		T13	1		T14	9
len_keccak_block_sizes[72]	752	1			T1	9		T14	9		T17	5
len_keccak_block_sizes[104]	756	1			T1	9		T13	1		T14	9
len_keccak_block_sizes[136]	763	1			T1	9		T13	1		T14	9
len_keccak_block_sizes[144]	289	1			T17	5		T159	5		T112	5
len_keccak_block_sizes[168]	290	1			T13	1		T17	5		T27	1
len_datapath_width	14362	1			T1	9		T2	3		T12	246
len_2_63	216505	1			T1	1643		T2	6		T4	390
len_1	63	1			T110	1		T33	1		T160	1