Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8798	1			T12	19		T15	30		T17	13
len_5001_7500	13941	1			T12	18		T15	30		T17	43
len_2501_5000	9263	1			T12	18		T15	30		T17	7
len_1025_2500	5343	1			T12	11		T15	16		T17	3
len_769_1024	5923	1			T3	5		T12	2		T15	4
len_513_768	6462	1			T3	2		T12	2		T15	2
len_257_512	20959	1			T3	7		T12	2		T15	244
len_0_256	256718	1			T1	9		T3	4		T12	274
len_keccak_block_sizes[72]	722	1			T12	2		T15	3		T18	2
len_keccak_block_sizes[104]	621	1			T12	2		T15	3		T18	2
len_keccak_block_sizes[136]	526	1			T12	2		T15	3		T18	2
len_keccak_block_sizes[144]	419	1			T15	3		T60	3		T61	2
len_keccak_block_sizes[168]	315	1			T15	3		T60	3		T63	3
len_1	764	1			T12	2		T15	3		T18	2
len_0	1172	1			T12	2		T13	2		T15	3