Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	648	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5236	1			T3	2		T17	11		T52	6
len_601_800	11741	1			T3	7		T17	16		T52	8
len_401_600	7869	1			T3	8		T17	23		T52	4
len_201_400	16261	1			T17	10		T52	4		T22	9
len_65_200	73503	1			T13	57		T15	685		T17	7
len_min_for_xof_require_squeeze	1001	1			T15	9		T60	9		T63	10
len_keccak_block_sizes[72]	753	1			T13	1		T15	9		T60	9
len_keccak_block_sizes[104]	743	1			T13	1		T15	9		T60	9
len_keccak_block_sizes[136]	744	1			T13	1		T15	9		T60	9
len_keccak_block_sizes[144]	289	1			T63	5		T85	5		T194	1
len_keccak_block_sizes[168]	277	1			T63	5		T85	5		T41	1
len_datapath_width	14026	1			T1	3		T13	4		T14	3
len_2_63	213804	1			T1	6		T2	121		T3	1
len_1	49	1			T3	1		T13	1		T121	1