Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8889 1 T1 3 T2 8 T16 30
len_5001_7500 14143 1 T1 7 T2 33 T13 33
len_2501_5000 9190 1 T1 2 T2 9 T13 34
len_1025_2500 5396 1 T1 1 T2 1 T13 20
len_769_1024 5863 1 T2 2 T3 31 T13 4
len_513_768 6398 1 T3 22 T13 3 T15 3
len_257_512 20922 1 T2 2 T3 27 T13 4
len_0_256 256939 1 T2 81 T3 33 T13 148
len_keccak_block_sizes[72] 724 1 T13 2 T15 2 T16 3
len_keccak_block_sizes[104] 626 1 T16 3 T18 3 T38 3
len_keccak_block_sizes[136] 514 1 T16 3 T18 3 T38 3
len_keccak_block_sizes[144] 427 1 T3 1 T16 3 T18 3
len_keccak_block_sizes[168] 315 1 T16 3 T18 3 T38 3
len_1 758 1 T13 2 T15 2 T16 3
len_0 1163 1 T2 4 T13 2 T14 1

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