Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10353 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9090 1 T1 11 T2 17 T3 8
len_5001_7500 14563 1 T1 37 T2 17 T3 34
len_2501_5000 9265 1 T1 13 T2 17 T3 4
len_1025_2500 5440 1 T1 3 T2 10 T3 5
len_769_1024 6162 1 T1 1 T2 2 T13 4
len_513_768 6690 1 T1 1 T2 2 T13 4
len_257_512 21283 1 T2 2 T13 52 T14 32
len_0_256 258224 1 T1 8 T2 290 T3 6
len_keccak_block_sizes[72] 714 1 T2 2 T13 3 T16 2
len_keccak_block_sizes[104] 618 1 T2 2 T13 3 T16 2
len_keccak_block_sizes[136] 528 1 T2 2 T13 3 T14 1
len_keccak_block_sizes[144] 420 1 T2 2 T13 3 T19 3
len_keccak_block_sizes[168] 324 1 T13 3 T19 3 T184 3
len_1 755 1 T2 2 T13 3 T16 2
len_0 1214 1 T1 2 T2 2 T13 3

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