Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10355	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8942	1			T12	23		T13	19		T15	19
len_5001_7500	14111	1			T3	33		T12	40		T13	18
len_2501_5000	9146	1			T3	34		T12	7		T13	18
len_1025_2500	5370	1			T3	20		T12	3		T13	11
len_769_1024	6085	1			T3	4		T12	1		T13	2
len_513_768	6432	1			T3	3		T12	1		T13	2
len_257_512	21017	1			T3	4		T12	3		T13	2
len_0_256	257542	1			T1	167		T2	9		T3	148
len_keccak_block_sizes[72]	724	1			T3	2		T13	2		T15	2
len_keccak_block_sizes[104]	628	1			T13	2		T15	2		T22	1
len_keccak_block_sizes[136]	528	1			T13	2		T14	1		T15	2
len_keccak_block_sizes[144]	421	1			T22	1		T62	3		T84	3
len_keccak_block_sizes[168]	335	1			T62	3		T84	3		T127	1
len_1	744	1			T1	4		T3	2		T13	2
len_0	1152	1			T1	2		T3	2		T12	3