Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10269	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8930	1			T1	42		T2	17		T3	12
len_5001_7500	14557	1			T1	88		T2	17		T3	38
len_2501_5000	9240	1			T1	18		T2	17		T3	8
len_1025_2500	5395	1			T1	13		T2	10		T3	3
len_769_1024	6076	1			T1	4		T2	2		T3	12
len_513_768	6333	1			T2	2		T3	10		T13	3
len_257_512	20763	1			T1	2		T2	2		T3	15
len_0_256	255390	1			T1	22		T2	290		T3	41
len_keccak_block_sizes[72]	720	1			T2	2		T13	2		T16	2
len_keccak_block_sizes[104]	615	1			T2	2		T13	2		T17	1
len_keccak_block_sizes[136]	523	1			T2	2		T39	2		T188	2
len_keccak_block_sizes[144]	421	1			T2	2		T188	2		T189	2
len_keccak_block_sizes[168]	309	1			T171	3		T190	3		T191	3
len_1	753	1			T2	2		T13	2		T16	2
len_0	1200	1			T1	7		T2	2		T3	1