Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	678	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5367	1			T1	24		T3	15		T17	14
len_601_800	12406	1			T1	64		T3	51		T17	28
len_401_600	8167	1			T1	46		T3	17		T17	15
len_201_400	16337	1			T1	21		T3	13		T17	7
len_65_200	72908	1			T1	17		T3	10		T17	3
len_min_for_xof_require_squeeze	998	1			T171	10		T190	10		T191	10
len_keccak_block_sizes[72]	743	1			T171	5		T190	5		T143	1
len_keccak_block_sizes[104]	745	1			T3	1		T171	5		T190	5
len_keccak_block_sizes[136]	736	1			T3	1		T171	5		T190	5
len_keccak_block_sizes[144]	289	1			T3	1		T171	5		T190	5
len_keccak_block_sizes[168]	284	1			T171	5		T190	5		T191	5
len_datapath_width	14061	1			T3	9		T15	3		T16	246
len_2_63	213082	1			T1	12		T2	390		T3	22
len_1	43	1			T87	2		T193	1		T22	1