Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8881	1			T2	11		T3	24		T11	24
len_5001_7500	14267	1			T2	45		T3	24		T11	24
len_2501_5000	9187	1			T2	7		T3	24		T11	24
len_1025_2500	5384	1			T2	3		T3	14		T11	14
len_769_1024	5988	1			T2	1		T3	2		T11	2
len_513_768	6418	1			T2	3		T3	3		T11	3
len_257_512	20803	1			T2	3		T3	2		T11	2
len_0_256	256753	1			T2	4		T3	211		T11	211
len_keccak_block_sizes[72]	718	1			T3	2		T11	2		T13	2
len_keccak_block_sizes[104]	629	1			T3	2		T11	2		T13	2
len_keccak_block_sizes[136]	519	1			T17	3		T64	3		T66	2
len_keccak_block_sizes[144]	419	1			T12	1		T17	3		T64	3
len_keccak_block_sizes[168]	316	1			T17	3		T28	1		T64	3
len_1	755	1			T3	2		T11	2		T13	2
len_0	1194	1			T3	2		T11	2		T13	2