Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	629	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5104	1			T3	17		T13	15		T19	6
len_601_800	11479	1			T3	47		T13	36		T19	9
len_401_600	7421	1			T3	37		T13	29		T19	12
len_201_400	16056	1			T3	10		T13	7		T19	7
len_65_200	73822	1			T2	67		T3	19		T13	7
len_min_for_xof_require_squeeze	992	1			T185	9		T186	9		T160	10
len_keccak_block_sizes[72]	755	1			T185	9		T133	1		T186	9
len_keccak_block_sizes[104]	753	1			T185	9		T186	9		T134	1
len_keccak_block_sizes[136]	757	1			T2	1		T185	9		T186	9
len_keccak_block_sizes[144]	289	1			T160	5		T187	5		T188	5
len_keccak_block_sizes[168]	277	1			T3	1		T160	5		T187	5
len_datapath_width	14022	1			T2	4		T3	13		T13	1
len_2_63	214624	1			T2	90		T3	86		T13	6
len_1	65	1			T2	1		T35	1		T189	1