Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8966	1			T2	16		T3	6		T14	25
len_5001_7500	14435	1			T2	32		T3	18		T13	33
len_2501_5000	9160	1			T2	7		T3	2		T13	34
len_1025_2500	5385	1			T2	2		T3	1		T13	20
len_769_1024	6392	1			T2	2		T3	5		T13	4
len_513_768	6674	1			T3	6		T13	3		T14	2
len_257_512	21198	1			T3	6		T13	4		T15	4
len_0_256	258280	1			T1	9		T2	10		T3	74
len_keccak_block_sizes[72]	723	1			T13	2		T15	2		T92	2
len_keccak_block_sizes[104]	623	1			T19	1		T92	2		T94	2
len_keccak_block_sizes[136]	521	1			T96	3		T197	2		T198	2
len_keccak_block_sizes[144]	433	1			T95	1		T96	3		T39	1
len_keccak_block_sizes[168]	327	1			T96	3		T199	3		T200	3
len_1	753	1			T13	2		T15	2		T18	1
len_0	1189	1			T2	2		T3	1		T13	2