Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8877	1			T1	24		T14	19		T17	8
len_5001_7500	14165	1			T1	24		T4	33		T14	18
len_2501_5000	9258	1			T1	24		T4	34		T14	18
len_1025_2500	5406	1			T1	14		T4	20		T14	11
len_769_1024	6206	1			T1	2		T2	9		T4	4
len_513_768	6516	1			T1	3		T2	12		T4	3
len_257_512	21102	1			T1	2		T2	9		T4	4
len_0_256	257068	1			T1	211		T2	12		T4	148
len_keccak_block_sizes[72]	717	1			T1	2		T4	2		T14	2
len_keccak_block_sizes[104]	617	1			T1	2		T14	2		T18	2
len_keccak_block_sizes[136]	514	1			T14	2		T19	2		T64	3
len_keccak_block_sizes[144]	434	1			T16	1		T29	1		T64	3
len_keccak_block_sizes[168]	326	1			T28	1		T64	3		T65	3
len_1	760	1			T1	2		T4	2		T14	2
len_0	1134	1			T1	2		T4	2		T14	2