Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9145	1			T1	38		T3	19		T14	19
len_5001_7500	14736	1			T1	36		T3	39		T14	18
len_2501_5000	9332	1			T1	36		T3	9		T14	18
len_1025_2500	5451	1			T1	22		T3	6		T14	11
len_769_1024	6324	1			T1	4		T2	13		T13	42
len_513_768	6699	1			T1	4		T2	14		T13	36
len_257_512	21417	1			T1	52		T2	13		T13	41
len_0_256	257048	1			T1	2017		T2	7		T3	9
len_keccak_block_sizes[72]	725	1			T1	3		T14	2		T15	2
len_keccak_block_sizes[104]	630	1			T1	3		T14	2		T15	2
len_keccak_block_sizes[136]	522	1			T1	3		T14	2		T17	2
len_keccak_block_sizes[144]	426	1			T1	3		T17	2		T41	2
len_keccak_block_sizes[168]	321	1			T1	3		T28	1		T180	3
len_1	751	1			T1	3		T14	2		T15	2
len_0	1182	1			T1	3		T14	2		T15	2