Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	678	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5681	1			T2	12		T3	14		T13	23
len_601_800	12779	1			T2	20		T3	27		T13	39
len_401_600	8618	1			T2	10		T3	19		T13	27
len_201_400	16652	1			T1	251		T2	4		T3	8
len_65_200	73613	1			T1	680		T3	11		T13	5
len_min_for_xof_require_squeeze	1002	1			T1	10		T27	1		T87	1
len_keccak_block_sizes[72]	749	1			T1	5		T68	1		T180	9
len_keccak_block_sizes[104]	750	1			T1	5		T24	1		T180	9
len_keccak_block_sizes[136]	752	1			T1	5		T87	1		T24	1
len_keccak_block_sizes[144]	290	1			T1	5		T3	2		T87	1
len_keccak_block_sizes[168]	276	1			T1	5		T182	5		T183	1
len_datapath_width	13937	1			T1	5		T16	1		T18	1
len_2_63	213771	1			T1	1329		T2	31		T3	1
len_1	55	1			T23	1		T24	1		T142	2