Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	663	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5812	1			T1	21		T14	3		T15	32
len_601_800	12923	1			T1	47		T14	10		T15	46
len_401_600	8525	1			T1	42		T14	7		T15	33
len_201_400	16620	1			T1	19		T14	5		T15	11
len_65_200	74030	1			T1	11		T2	685		T14	2
len_min_for_xof_require_squeeze	1014	1			T2	9		T85	9		T86	9
len_keccak_block_sizes[72]	767	1			T2	9		T15	1		T85	9
len_keccak_block_sizes[104]	752	1			T2	9		T85	9		T86	9
len_keccak_block_sizes[136]	756	1			T2	9		T85	9		T86	9
len_keccak_block_sizes[144]	276	1			T173	5		T174	1		T175	5
len_keccak_block_sizes[168]	281	1			T173	5		T133	1		T176	2
len_datapath_width	14145	1			T2	9		T15	18		T16	3
len_2_63	214885	1			T1	6		T2	1643		T3	390
len_1	50	1			T89	1		T132	1		T133	1