Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10354	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8993	1			T2	11		T13	16		T18	38
len_5001_7500	14225	1			T2	33		T13	49		T15	33
len_2501_5000	9275	1			T2	7		T13	13		T15	34
len_1025_2500	5431	1			T2	4		T13	9		T15	20
len_769_1024	5909	1			T3	24		T9	22		T13	1
len_513_768	6318	1			T2	1		T3	29		T9	33
len_257_512	20731	1			T2	1		T3	39		T9	28
len_0_256	257058	1			T2	9		T3	29		T9	22
len_keccak_block_sizes[72]	729	1			T15	2		T18	3		T19	2
len_keccak_block_sizes[104]	624	1			T18	3		T87	2		T67	3
len_keccak_block_sizes[136]	520	1			T18	3		T87	2		T67	3
len_keccak_block_sizes[144]	421	1			T18	3		T87	2		T67	3
len_keccak_block_sizes[168]	323	1			T18	3		T67	3		T184	3
len_1	745	1			T15	2		T18	3		T19	2
len_0	1219	1			T2	2		T13	4		T15	2