Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8765	1			T17	17		T19	19		T48	24
len_5001_7500	14019	1			T17	17		T19	18		T74	33
len_2501_5000	9171	1			T17	17		T19	18		T74	34
len_1025_2500	5404	1			T17	10		T19	11		T74	20
len_769_1024	6308	1			T16	31		T17	2		T19	2
len_513_768	6793	1			T16	19		T17	2		T19	2
len_257_512	21156	1			T16	28		T17	2		T19	2
len_0_256	257509	1			T3	9		T13	9		T16	29
len_keccak_block_sizes[72]	718	1			T17	2		T19	2		T74	2
len_keccak_block_sizes[104]	621	1			T17	2		T19	2		T48	2
len_keccak_block_sizes[136]	530	1			T17	2		T19	2		T24	1
len_keccak_block_sizes[144]	419	1			T17	2		T86	2		T87	3
len_keccak_block_sizes[168]	321	1			T39	1		T87	3		T112	3
len_1	757	1			T17	2		T19	2		T74	2
len_0	1174	1			T17	2		T19	2		T74	2