Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	655	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5449	1			T16	13		T22	9		T23	29
len_601_800	12260	1			T16	42		T22	22		T23	74
len_401_600	8159	1			T16	23		T22	10		T23	50
len_201_400	16408	1			T16	14		T22	1		T23	14
len_65_200	73925	1			T13	4		T16	8		T22	4
len_min_for_xof_require_squeeze	1003	1			T16	1		T39	1		T87	9
len_keccak_block_sizes[72]	752	1			T23	1		T24	4		T87	9
len_keccak_block_sizes[104]	756	1			T24	2		T39	2		T87	9
len_keccak_block_sizes[136]	751	1			T24	2		T39	1		T87	9
len_keccak_block_sizes[144]	288	1			T112	5		T115	2		T177	5
len_keccak_block_sizes[168]	291	1			T41	1		T112	5		T113	2
len_datapath_width	13965	1			T3	3		T74	246		T23	7
len_2_63	214153	1			T3	6		T13	5		T16	3
len_1	64	1			T115	3		T178	1		T179	1