Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	697	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5495	1			T1	13		T3	4		T13	28
len_601_800	12607	1			T1	30		T3	14		T13	50
len_401_600	8133	1			T1	27		T3	8		T13	31
len_201_400	16461	1			T1	14		T3	3		T13	11
len_65_200	73670	1			T1	7		T2	685		T3	3
len_min_for_xof_require_squeeze	1008	1			T2	9		T12	9		T17	1
len_keccak_block_sizes[72]	752	1			T2	9		T12	9		T17	1
len_keccak_block_sizes[104]	744	1			T2	9		T12	9		T17	1
len_keccak_block_sizes[136]	751	1			T2	9		T12	9		T17	1
len_keccak_block_sizes[144]	279	1			T64	1		T72	5		T174	5
len_keccak_block_sizes[168]	283	1			T14	1		T72	5		T174	5
len_datapath_width	14051	1			T2	9		T12	9		T17	6
len_2_63	214292	1			T1	30		T2	1643		T3	17
len_1	57	1			T15	1		T64	2		T37	1