Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8956	1			T2	17		T14	38		T16	38
len_5001_7500	14305	1			T2	32		T14	36		T16	36
len_2501_5000	9250	1			T2	11		T14	36		T16	36
len_1025_2500	5450	1			T2	6		T14	22		T16	22
len_769_1024	6127	1			T2	2		T13	34		T14	4
len_513_768	6488	1			T13	34		T14	4		T16	4
len_257_512	20984	1			T2	2		T13	27		T14	52
len_0_256	257116	1			T2	13		T3	9		T13	43
len_keccak_block_sizes[72]	728	1			T14	3		T16	3		T24	1
len_keccak_block_sizes[104]	624	1			T14	3		T16	3		T30	2
len_keccak_block_sizes[136]	524	1			T14	3		T16	3		T89	3
len_keccak_block_sizes[144]	422	1			T14	3		T16	3		T89	3
len_keccak_block_sizes[168]	321	1			T14	3		T16	3		T24	1
len_1	744	1			T14	3		T16	3		T25	2
len_0	1150	1			T2	3		T14	3		T16	3