Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8873	1			T1	24		T3	24		T15	30
len_5001_7500	14415	1			T1	24		T3	24		T15	30
len_2501_5000	9284	1			T1	24		T3	24		T15	30
len_1025_2500	5406	1			T1	14		T3	14		T15	16
len_769_1024	6133	1			T1	2		T3	2		T13	29
len_513_768	6578	1			T1	3		T3	3		T13	22
len_257_512	21055	1			T1	2		T3	2		T13	23
len_0_256	256830	1			T1	211		T3	211		T13	17
len_keccak_block_sizes[72]	722	1			T1	2		T3	2		T15	3
len_keccak_block_sizes[104]	619	1			T1	2		T3	2		T15	3
len_keccak_block_sizes[136]	517	1			T14	1		T15	3		T16	2
len_keccak_block_sizes[144]	430	1			T15	3		T16	2		T18	1
len_keccak_block_sizes[168]	321	1			T14	1		T15	3		T37	3
len_1	747	1			T1	2		T3	2		T15	3
len_0	1192	1			T1	2		T3	2		T15	3