Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	631	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5294	1			T13	14		T14	24		T18	10
len_601_800	12232	1			T13	35		T14	54		T18	18
len_401_600	8310	1			T13	22		T14	37		T18	13
len_201_400	16409	1			T13	8		T14	12		T18	4
len_65_200	73763	1			T13	7		T14	10		T15	685
len_min_for_xof_require_squeeze	988	1			T15	9		T37	9		T185	10
len_keccak_block_sizes[72]	759	1			T15	9		T37	9		T186	1
len_keccak_block_sizes[104]	752	1			T15	9		T37	9		T186	1
len_keccak_block_sizes[136]	764	1			T15	9		T37	9		T75	1
len_keccak_block_sizes[144]	284	1			T14	1		T187	1		T185	5
len_keccak_block_sizes[168]	282	1			T58	1		T185	5		T188	5
len_datapath_width	13948	1			T14	5		T15	9		T17	246
len_2_63	214071	1			T1	310		T3	310		T13	31
len_1	68	1			T186	1		T187	1		T144	1