Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10355	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9066	1			T3	17		T12	14		T14	19
len_5001_7500	14368	1			T3	17		T12	35		T14	18
len_2501_5000	9237	1			T3	17		T12	7		T14	18
len_1025_2500	5418	1			T3	10		T12	2		T14	11
len_769_1024	5835	1			T1	32		T2	41		T3	2
len_513_768	6347	1			T1	35		T2	40		T3	2
len_257_512	20854	1			T1	46		T2	36		T3	2
len_0_256	257472	1			T1	39		T2	38		T3	290
len_keccak_block_sizes[72]	726	1			T3	2		T12	1		T14	2
len_keccak_block_sizes[104]	624	1			T3	2		T14	2		T15	1
len_keccak_block_sizes[136]	529	1			T3	2		T14	2		T17	3
len_keccak_block_sizes[144]	418	1			T3	2		T17	3		T37	3
len_keccak_block_sizes[168]	318	1			T17	3		T37	3		T23	1
len_1	759	1			T3	2		T14	2		T17	3
len_0	1175	1			T3	2		T12	2		T14	2