Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	634	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5402	1			T1	17		T14	2		T18	9
len_601_800	12443	1			T1	56		T14	13		T18	33
len_401_600	8365	1			T1	30		T14	6		T18	17
len_201_400	16560	1			T1	14		T14	4		T18	11
len_65_200	74058	1			T1	4		T14	1		T15	94
len_min_for_xof_require_squeeze	1013	1			T16	1		T65	1		T85	10
len_keccak_block_sizes[72]	762	1			T15	5		T85	5		T87	9
len_keccak_block_sizes[104]	753	1			T85	5		T87	9		T187	1
len_keccak_block_sizes[136]	767	1			T15	1		T16	1		T85	5
len_keccak_block_sizes[144]	285	1			T85	5		T188	1		T189	5
len_keccak_block_sizes[168]	291	1			T15	1		T85	5		T189	5
len_datapath_width	14082	1			T2	3		T13	3		T15	8
len_2_63	214759	1			T1	70		T2	6		T13	6
len_1	57	1			T14	1		T28	1		T190	1