Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9180	1			T1	17		T14	19		T17	17
len_5001_7500	14819	1			T1	17		T14	18		T17	37
len_2501_5000	9327	1			T1	17		T14	18		T17	8
len_1025_2500	5423	1			T1	10		T14	11		T17	7
len_769_1024	6004	1			T1	2		T2	16		T14	2
len_513_768	6388	1			T1	2		T2	15		T14	2
len_257_512	20893	1			T1	2		T2	14		T14	2
len_0_256	256827	1			T1	290		T2	11		T13	9
len_keccak_block_sizes[72]	729	1			T1	2		T14	2		T35	2
len_keccak_block_sizes[104]	623	1			T1	2		T14	2		T15	1
len_keccak_block_sizes[136]	525	1			T1	2		T14	2		T17	1
len_keccak_block_sizes[144]	420	1			T1	2		T17	1		T112	3
len_keccak_block_sizes[168]	319	1			T112	3		T175	3		T176	3
len_1	752	1			T1	2		T14	2		T35	2
len_0	1185	1			T1	2		T14	2		T17	1