Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9025	1			T1	17		T2	16		T3	30
len_5001_7500	14533	1			T1	17		T2	37		T3	30
len_2501_5000	9275	1			T1	17		T2	3		T3	30
len_1025_2500	5412	1			T1	10		T2	3		T3	16
len_769_1024	6094	1			T1	2		T2	1		T3	4
len_513_768	6574	1			T1	2		T2	1		T3	2
len_257_512	21029	1			T1	2		T2	1		T3	244
len_0_256	256681	1			T1	290		T2	7		T3	1897
len_keccak_block_sizes[72]	726	1			T1	2		T3	3		T35	2
len_keccak_block_sizes[104]	632	1			T1	2		T3	3		T35	2
len_keccak_block_sizes[136]	521	1			T1	2		T3	3		T16	1
len_keccak_block_sizes[144]	420	1			T1	2		T3	3		T70	3
len_keccak_block_sizes[168]	317	1			T3	3		T70	3		T74	3
len_1	735	1			T1	2		T3	3		T35	2
len_0	1172	1			T1	2		T3	3		T13	1