Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	667	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5497	1			T2	12		T13	11		T15	42
len_601_800	12385	1			T2	21		T13	24		T15	65
len_401_600	8243	1			T2	18		T13	16		T15	41
len_201_400	16441	1			T2	9		T13	5		T15	25
len_65_200	73410	1			T2	6		T3	685		T13	11
len_min_for_xof_require_squeeze	995	1			T3	9		T70	10		T74	9
len_keccak_block_sizes[72]	749	1			T3	9		T70	5		T71	1
len_keccak_block_sizes[104]	745	1			T3	9		T14	1		T70	5
len_keccak_block_sizes[136]	748	1			T3	9		T14	1		T70	5
len_keccak_block_sizes[144]	289	1			T13	1		T14	1		T15	1
len_keccak_block_sizes[168]	272	1			T70	5		T93	1		T23	2
len_datapath_width	14004	1			T3	9		T13	2		T14	2
len_2_63	213598	1			T1	390		T2	3		T3	1643
len_1	40	1			T17	1		T26	1		T24	1