Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	636	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5363	1			T13	15		T14	22		T15	4
len_601_800	12023	1			T3	1		T13	28		T14	49
len_401_600	8064	1			T3	1		T13	17		T14	33
len_201_400	16333	1			T3	1		T13	9		T14	15
len_65_200	73290	1			T1	8		T12	685		T13	2
len_min_for_xof_require_squeeze	1006	1			T12	9		T89	10		T66	2
len_keccak_block_sizes[72]	757	1			T12	9		T14	1		T89	5
len_keccak_block_sizes[104]	753	1			T12	9		T14	1		T89	5
len_keccak_block_sizes[136]	741	1			T12	9		T89	5		T178	9
len_keccak_block_sizes[144]	269	1			T89	5		T179	5		T180	5
len_keccak_block_sizes[168]	274	1			T89	5		T179	5		T180	5
len_datapath_width	14050	1			T1	1		T12	9		T14	1
len_2_63	213615	1			T1	4		T2	390		T12	1643
len_1	53	1			T181	1		T90	1		T182	2