Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8834	1			T13	30		T15	17		T16	22
len_5001_7500	13980	1			T13	30		T15	17		T16	56
len_2501_5000	9144	1			T13	30		T15	17		T16	10
len_1025_2500	5418	1			T13	16		T15	10		T16	6
len_769_1024	5916	1			T1	8		T3	25		T13	4
len_513_768	6218	1			T1	19		T3	35		T13	2
len_257_512	20805	1			T1	15		T3	16		T13	244
len_0_256	257444	1			T1	14		T3	29		T13	1897
len_keccak_block_sizes[72]	717	1			T3	1		T13	3		T15	2
len_keccak_block_sizes[104]	618	1			T13	3		T15	2		T18	3
len_keccak_block_sizes[136]	524	1			T13	3		T15	2		T18	3
len_keccak_block_sizes[144]	419	1			T13	3		T15	2		T18	3
len_keccak_block_sizes[168]	324	1			T13	3		T16	1		T18	3
len_1	766	1			T13	3		T15	2		T18	3
len_0	1202	1			T13	3		T15	2		T16	2