Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	620	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5132	1			T1	7		T3	19		T16	24
len_601_800	11707	1			T1	15		T3	49		T16	32
len_401_600	7755	1			T1	10		T3	19		T16	30
len_201_400	16228	1			T1	3		T3	7		T16	11
len_65_200	73814	1			T1	5		T3	7		T13	685
len_min_for_xof_require_squeeze	1003	1			T3	1		T13	9		T18	10
len_keccak_block_sizes[72]	769	1			T13	9		T18	5		T19	9
len_keccak_block_sizes[104]	752	1			T13	9		T18	5		T19	9
len_keccak_block_sizes[136]	760	1			T13	9		T18	5		T19	9
len_keccak_block_sizes[144]	275	1			T18	5		T23	1		T90	5
len_keccak_block_sizes[168]	294	1			T18	5		T77	1		T90	5
len_datapath_width	14084	1			T13	9		T14	3		T17	1
len_2_63	214788	1			T1	8		T3	70		T13	1643
len_1	59	1			T23	2		T24	1		T191	1