Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9057	1			T14	30		T15	11		T16	19
len_5001_7500	14507	1			T14	30		T15	47		T16	18
len_2501_5000	9285	1			T14	30		T15	8		T16	18
len_1025_2500	5425	1			T14	16		T15	1		T16	11
len_769_1024	6005	1			T1	2		T12	33		T14	4
len_513_768	6487	1			T1	1		T12	33		T14	2
len_257_512	20779	1			T12	30		T14	244		T15	1
len_0_256	256828	1			T1	3		T2	9		T12	33
len_keccak_block_sizes[72]	719	1			T14	3		T16	2		T76	3
len_keccak_block_sizes[104]	626	1			T12	1		T14	3		T16	2
len_keccak_block_sizes[136]	524	1			T12	1		T14	3		T16	2
len_keccak_block_sizes[144]	425	1			T14	3		T76	3		T77	2
len_keccak_block_sizes[168]	314	1			T12	1		T14	3		T76	3
len_1	752	1			T14	3		T16	2		T76	3
len_0	1202	1			T14	3		T15	4		T16	2