Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	666	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5375	1			T1	1		T12	15		T15	17
len_601_800	12115	1			T1	1		T12	57		T15	22
len_401_600	8179	1			T1	3		T12	37		T15	19
len_201_400	16351	1			T1	1		T12	9		T15	7
len_65_200	73510	1			T12	4		T14	685		T15	3
len_min_for_xof_require_squeeze	993	1			T14	9		T76	10		T78	9
len_keccak_block_sizes[72]	754	1			T14	9		T76	5		T78	9
len_keccak_block_sizes[104]	749	1			T14	9		T76	5		T78	9
len_keccak_block_sizes[136]	754	1			T14	9		T76	5		T78	9
len_keccak_block_sizes[144]	276	1			T76	5		T187	1		T142	1
len_keccak_block_sizes[168]	296	1			T76	5		T173	5		T188	5
len_datapath_width	13999	1			T2	3		T12	1		T13	3
len_2_63	214601	1			T1	4		T2	6		T12	34
len_1	51	1			T79	1		T28	1		T187	2