Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9073	1			T1	3		T13	24		T15	22
len_5001_7500	14456	1			T1	16		T13	24		T15	55
len_2501_5000	9267	1			T1	3		T13	24		T15	11
len_1025_2500	5442	1			T1	2		T13	14		T15	5
len_769_1024	6138	1			T1	39		T13	2		T14	5
len_513_768	6724	1			T1	42		T13	3		T14	6
len_257_512	21207	1			T1	30		T13	2		T14	5
len_0_256	257134	1			T1	115		T2	24		T13	211
len_keccak_block_sizes[72]	717	1			T13	2		T18	3		T35	2
len_keccak_block_sizes[104]	623	1			T13	2		T18	3		T35	2
len_keccak_block_sizes[136]	522	1			T18	3		T35	2		T67	3
len_keccak_block_sizes[144]	423	1			T1	1		T18	3		T35	2
len_keccak_block_sizes[168]	328	1			T18	3		T67	3		T170	3
len_1	759	1			T2	1		T13	2		T18	3
len_0	1154	1			T1	1		T2	2		T13	2