Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8931 1 T3 15 T14 38 T19 38
len_5001_7500 14119 1 T3 49 T14 36 T19 36
len_2501_5000 9188 1 T3 7 T14 36 T19 36
len_1025_2500 5419 1 T3 6 T14 22 T19 22
len_769_1024 6294 1 T1 3 T3 12 T14 4
len_513_768 6681 1 T1 2 T3 22 T14 4
len_257_512 21122 1 T1 3 T3 12 T14 52
len_0_256 257608 1 T1 4 T2 9 T3 154
len_keccak_block_sizes[72] 724 1 T14 3 T19 3 T91 2
len_keccak_block_sizes[104] 637 1 T14 3 T19 3 T81 2
len_keccak_block_sizes[136] 519 1 T14 3 T18 1 T19 3
len_keccak_block_sizes[144] 421 1 T14 3 T19 3 T23 1
len_keccak_block_sizes[168] 316 1 T14 3 T19 3 T185 3
len_1 762 1 T14 3 T17 3 T19 3
len_0 1189 1 T3 3 T14 3 T17 5

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