Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	621	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5488	1			T1	3		T3	12		T18	3
len_601_800	12385	1			T1	2		T3	52		T18	4
len_401_600	8260	1			T1	3		T3	38		T18	7
len_201_400	16438	1			T1	2		T3	27		T14	251
len_65_200	73755	1			T1	1		T3	55		T14	680
len_min_for_xof_require_squeeze	1014	1			T14	10		T19	10		T88	1
len_keccak_block_sizes[72]	747	1			T14	5		T19	5		T185	5
len_keccak_block_sizes[104]	754	1			T3	1		T14	5		T17	1
len_keccak_block_sizes[136]	754	1			T14	5		T17	4		T19	5
len_keccak_block_sizes[144]	288	1			T14	5		T19	5		T185	5
len_keccak_block_sizes[168]	288	1			T3	2		T14	5		T19	5
len_datapath_width	13983	1			T2	3		T3	13		T14	5
len_2_63	214272	1			T1	5		T2	6		T3	92
len_1	56	1			T132	1		T186	1		T187	1