Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9138	1			T1	39		T2	24		T11	31
len_5001_7500	14774	1			T1	86		T2	24		T11	92
len_2501_5000	9331	1			T1	17		T2	24		T11	25
len_1025_2500	5492	1			T1	13		T2	14		T11	8
len_769_1024	6010	1			T1	3		T2	2		T11	1
len_513_768	6453	1			T2	3		T12	6		T14	4
len_257_512	20695	1			T1	1		T2	2		T11	1
len_0_256	257595	1			T1	20		T2	211		T11	16
len_keccak_block_sizes[72]	714	1			T2	2		T14	3		T15	2
len_keccak_block_sizes[104]	620	1			T2	2		T14	3		T16	3
len_keccak_block_sizes[136]	520	1			T14	3		T16	3		T37	2
len_keccak_block_sizes[144]	425	1			T14	3		T16	3		T28	1
len_keccak_block_sizes[168]	323	1			T14	3		T16	3		T156	3
len_1	762	1			T2	2		T14	3		T15	2
len_0	1224	1			T1	3		T2	2		T11	2