Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9022	1			T2	24		T14	17		T15	19
len_5001_7500	14449	1			T2	24		T14	17		T15	18
len_2501_5000	9257	1			T2	24		T14	17		T15	18
len_1025_2500	5452	1			T2	14		T14	10		T15	11
len_769_1024	6090	1			T2	2		T4	29		T14	2
len_513_768	6694	1			T2	3		T4	21		T14	2
len_257_512	21096	1			T2	2		T4	24		T14	2
len_0_256	256871	1			T2	211		T4	26		T14	290
len_keccak_block_sizes[72]	723	1			T2	2		T14	2		T15	2
len_keccak_block_sizes[104]	623	1			T2	2		T14	2		T15	2
len_keccak_block_sizes[136]	528	1			T14	2		T15	2		T18	2
len_keccak_block_sizes[144]	421	1			T14	2		T18	2		T19	3
len_keccak_block_sizes[168]	320	1			T4	1		T19	3		T39	1
len_1	749	1			T2	2		T14	2		T15	2
len_0	1183	1			T2	2		T14	2		T15	2