Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8861 1 T1 19 T2 24 T3 30
len_5001_7500 14391 1 T1 18 T2 24 T3 30
len_2501_5000 9278 1 T1 18 T2 24 T3 30
len_1025_2500 5371 1 T1 11 T2 14 T3 16
len_769_1024 6088 1 T1 2 T2 2 T3 4
len_513_768 6405 1 T1 2 T2 3 T3 2
len_257_512 21055 1 T1 2 T2 2 T3 244
len_0_256 257690 1 T1 274 T2 211 T3 1897
len_keccak_block_sizes[72] 715 1 T1 2 T2 2 T3 3
len_keccak_block_sizes[104] 625 1 T1 2 T2 2 T3 3
len_keccak_block_sizes[136] 513 1 T1 2 T3 3 T19 3
len_keccak_block_sizes[144] 425 1 T3 3 T19 3 T88 3
len_keccak_block_sizes[168] 321 1 T3 3 T19 3 T28 1
len_1 759 1 T1 2 T2 2 T3 3
len_0 1179 1 T1 2 T2 2 T3 3

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