Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 5729 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 6200 1 T13 19 T15 19 T19 24
len_5001_7500 10738 1 T13 18 T15 18 T19 24
len_2501_5000 6794 1 T13 18 T15 18 T19 24
len_1025_2500 4041 1 T13 11 T15 11 T19 14
len_769_1024 5673 1 T3 30 T13 2 T14 13
len_513_768 6019 1 T3 44 T13 2 T14 15
len_257_512 11080 1 T3 32 T13 2 T14 16
len_0_256 129511 1 T1 9 T3 38 T13 274
len_keccak_block_sizes[72] 520 1 T13 2 T15 2 T18 1
len_keccak_block_sizes[104] 425 1 T13 2 T15 2 T19 2
len_keccak_block_sizes[136] 325 1 T13 2 T15 2 T18 1
len_keccak_block_sizes[144] 231 1 T168 1 T169 3 T170 2
len_keccak_block_sizes[168] 131 1 T169 3 T170 1 T171 3
len_1 562 1 T13 2 T15 2 T19 2
len_0 948 1 T13 2 T15 2 T19 2

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