Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	604	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	4878	1			T3	20		T14	6		T18	19
len_601_800	10915	1			T3	38		T14	15		T18	36
len_401_600	7444	1			T3	31		T14	11		T18	30
len_201_400	7913	1			T3	13		T14	3		T18	10
len_65_200	29186	1			T3	8		T14	3		T18	3
len_min_for_xof_require_squeeze	392	1			T25	1		T169	10		T173	1
len_keccak_block_sizes[72]	280	1			T169	5		T174	1		T175	1
len_keccak_block_sizes[104]	313	1			T77	1		T66	1		T169	5
len_keccak_block_sizes[136]	301	1			T24	2		T169	5		T175	1
len_keccak_block_sizes[144]	126	1			T24	1		T169	5		T175	1
len_keccak_block_sizes[168]	119	1			T168	1		T169	5		T176	1
len_datapath_width	13627	1			T1	3		T16	3		T17	3
len_2_63	117262	1			T1	6		T2	32		T3	13
len_1	53	1			T77	1		T24	1		T174	1