Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 6320 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 6721 1 T1 24 T2 38 T13 19
len_5001_7500 11548 1 T1 24 T2 36 T13 18
len_2501_5000 7139 1 T1 24 T2 36 T13 18
len_1025_2500 4235 1 T1 14 T2 22 T13 11
len_769_1024 5924 1 T1 2 T2 4 T13 2
len_513_768 6384 1 T1 3 T2 4 T13 2
len_257_512 12318 1 T1 2 T2 52 T13 2
len_0_256 146392 1 T1 211 T2 2017 T3 40
len_keccak_block_sizes[72] 558 1 T1 2 T2 3 T13 2
len_keccak_block_sizes[104] 447 1 T1 2 T2 3 T13 2
len_keccak_block_sizes[136] 340 1 T2 3 T13 2 T18 3
len_keccak_block_sizes[144] 251 1 T2 3 T18 3 T87 3
len_keccak_block_sizes[168] 158 1 T2 3 T14 1 T18 3
len_1 598 1 T1 2 T2 3 T13 2
len_0 978 1 T1 2 T2 3 T3 3

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