Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5951	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6478	1			T2	30		T4	3		T15	31
len_5001_7500	11215	1			T2	30		T4	10		T15	75
len_2501_5000	6932	1			T2	30		T4	3		T15	22
len_1025_2500	4131	1			T2	16		T4	1		T15	6
len_769_1024	5330	1			T2	4		T4	2		T13	30
len_513_768	5772	1			T2	2		T4	3		T13	36
len_257_512	11169	1			T2	244		T4	2		T13	49
len_0_256	134564	1			T2	1897		T3	9		T4	9
len_keccak_block_sizes[72]	530	1			T2	3		T13	1		T16	2
len_keccak_block_sizes[104]	427	1			T2	3		T17	2		T18	2
len_keccak_block_sizes[136]	334	1			T2	3		T13	1		T18	2
len_keccak_block_sizes[144]	231	1			T2	3		T13	1		T26	1
len_keccak_block_sizes[168]	133	1			T2	3		T85	3		T86	3
len_1	556	1			T2	3		T16	2		T17	2
len_0	969	1			T2	3		T4	1		T15	10