Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	572	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	4818	1			T4	4		T13	19		T14	23
len_601_800	10720	1			T4	10		T13	52		T14	49
len_401_600	7166	1			T4	6		T13	29		T14	35
len_201_400	8446	1			T4	4		T13	22		T14	18
len_65_200	30837	1			T2	685		T4	5		T13	15
len_min_for_xof_require_squeeze	407	1			T2	9		T80	1		T26	1
len_keccak_block_sizes[72]	313	1			T2	9		T13	1		T15	1
len_keccak_block_sizes[104]	315	1			T2	9		T111	1		T85	5
len_keccak_block_sizes[136]	310	1			T2	9		T80	1		T26	1
len_keccak_block_sizes[144]	126	1			T85	5		T86	5		T27	1
len_keccak_block_sizes[168]	123	1			T85	5		T86	5		T191	5
len_datapath_width	13553	1			T2	9		T3	3		T13	1
len_2_63	120376	1			T2	1643		T3	6		T4	4
len_1	39	1			T80	1		T192	1		T193	1