Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	6336	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6723	1			T3	24		T14	19		T16	24
len_5001_7500	11668	1			T1	33		T3	24		T13	33
len_2501_5000	7202	1			T1	34		T3	24		T13	34
len_1025_2500	4252	1			T1	20		T3	14		T13	20
len_769_1024	6098	1			T1	4		T3	2		T13	4
len_513_768	6613	1			T1	3		T3	3		T13	3
len_257_512	12915	1			T1	4		T3	2		T13	4
len_0_256	144352	1			T1	148		T2	9		T3	211
len_keccak_block_sizes[72]	546	1			T1	2		T3	2		T13	2
len_keccak_block_sizes[104]	445	1			T3	2		T14	2		T16	2
len_keccak_block_sizes[136]	345	1			T14	2		T71	2		T24	1
len_keccak_block_sizes[144]	253	1			T23	1		T71	2		T148	2
len_keccak_block_sizes[168]	153	1			T50	1		T192	3		T193	1
len_1	569	1			T1	2		T3	2		T13	2
len_0	964	1			T1	2		T3	2		T13	2