Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	606	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5315	1			T17	46		T18	5		T23	25
len_601_800	12088	1			T17	79		T18	10		T23	48
len_401_600	7737	1			T17	63		T18	5		T23	29
len_201_400	8847	1			T17	19		T18	5		T23	19
len_65_200	34419	1			T17	9		T18	4		T23	5
len_min_for_xof_require_squeeze	452	1			T24	1		T25	1		T192	10
len_keccak_block_sizes[72]	359	1			T191	2		T113	1		T192	5
len_keccak_block_sizes[104]	357	1			T147	1		T192	5		T110	1
len_keccak_block_sizes[136]	356	1			T17	1		T39	1		T191	2
len_keccak_block_sizes[144]	135	1			T41	1		T147	1		T25	1
len_keccak_block_sizes[168]	144	1			T147	1		T25	1		T192	5
len_datapath_width	13703	1			T1	246		T2	3		T13	246
len_2_63	129275	1			T2	6		T3	310		T14	374
len_1	47	1			T39	1		T50	1		T194	1