Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	633	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5222	1			T1	5		T2	21		T3	18
len_601_800	11864	1			T1	6		T2	58		T3	38
len_401_600	7722	1			T1	1		T2	31		T3	28
len_201_400	8848	1			T1	3		T2	16		T3	9
len_65_200	34121	1			T1	1		T2	9		T3	11
len_min_for_xof_require_squeeze	457	1			T2	1		T15	10		T25	1
len_keccak_block_sizes[72]	352	1			T15	5		T16	1		T25	1
len_keccak_block_sizes[104]	352	1			T15	5		T23	1		T64	1
len_keccak_block_sizes[136]	348	1			T15	5		T23	1		T121	1
len_keccak_block_sizes[144]	135	1			T15	5		T130	1		T90	1
len_keccak_block_sizes[168]	133	1			T15	5		T23	1		T80	1
len_datapath_width	13688	1			T15	5		T16	8		T17	3
len_2_63	126177	1			T1	12		T2	40		T3	3
len_1	63	1			T16	1		T64	1		T121	5